1. Field of the Invention
The present invention relates to an image sensor, and more particularly, to a charged coupled device (CCD) image sensor which improves Charge Device Model (CDM) characteristic between a reset gate of a CCD and a VDD terminal.
2. Background of the Related Art
Generally, high packing density and low power of a semiconductor device including an image sensor are required to improve reliability of the semiconductor device. By contrast, an Electro Static Discharge (ESD) lowers the reliability of the semiconductor. A Human Body Model (HBM), a Machine Model (MM), and a Charged Device Model (CDM) are known as an ESD model until now. The HBM is the ESD model generated by a human, the MM is the ESD model generated by an equipment, and the CDM is the ESD model generated due to (+)/(xe2x88x92) charges of a package during a fabricating process of the product.
Typically, an ESD level is determined by elements such as a ESD protecting circuit, a layout, and a fabricating process. Recently, it is noted that the low power reduces the thickness of a gate oxide film. This is susceptible to the ESD. The CDM has lately attracted considerable attention. The CDM directly acts on yield of the product because a chip is destroyed by the charged state during the fabricating process. Thus, it is very important to optimize the CDM characteristic so as to improve reliability of the product.
A related art CCD image sensor will be described with reference to the accompanying appended drawing.
FIG. 1 is an equivalent circuit of a reset gate and a VDD terminal according to the related art CCD image sensor.
As shown in FIG. 1, the related art CCD image sensor includes a reset gate 11, a VDD terminal 12, a first input resistor 13 connected to the reset gate 11, a second input resistor 14 connected to the VDD terminal 12, a first poly resistor 15 and a second poly resistor 16 serially connected to each input resistor, a capacitor 17 serially connected between the first poly resistor 15 and the second poly resistor 16, a first ESD protecting circuit 18 formed between a ground terminal (GND) and a branched point which is between the reset gate 11 and the first input resistor 13, and a second ESD protecting circuit 19 formed between the GND and a branched point which is between the VDD terminal 12 and the second input resistor 14.
The capacitor 17 has a very small capacitance of 20 fF and cannot increase its capacitance any more due to a design rule.
The first and second input resistors 13 and 14 have 25xcexa9, respectively. The first poly resistor 15 has 1 Kxcexa9 and the second poly resistor 16 has 200xcexa9.
Generally, in case of the CCD image sensor, charges generated at a pixel are converted into a voltage through a floating diffusion(FD) region by a source follower, and discharged through the VDD terminal 12. An on/off device responsible for the discharge is the reset gate 11 and the size of the device is very small due to its characteristic. For this reason, a capacitance value of a reset transistor(formed by a reset gate and source/drain both sides of the reset gate) is necessarily small.
Accordingly, when a chip has charges caused by friction and contacts a material of low potential, charges in the chip are instantaneously discharged so that the chip is damaged. That is, when the reset gate 11 or the VDD terminal 12 is connected to the GND, the charges caused by friction are discharged through the capacitor 17 so that break-down of a dielectric film of the reset gate is caused.
The CDM characteristic between the reset gate and the VDD terminal according to the related art, causes break-down of the dielectric film of the reset gate at 400V.
The related art CCD image sensor has several problems.
When the reset gate or the VDD terminal is connected to the GND, the charges caused by friction are discharged through the capacitor, thereby causing break-down of the dielectric film of the reset gate. The break-down deteriorates CDM characteristic of the ESD. That is, errors of CDM pulse, such as break-down of the dielectric, are generated by a pulse rising time and a current peak value. The current peak value occurs during the pulse rising time.
Accordingly, it is necessary to increase the pulse rising time and reduce the current peak value to prevent the break-down of the dielectric film. To this end, (Resistancexc3x97capacitance) value also should be very large, but the value is limited due to characteristic of the device. Therefore, a proper protecting circuit should be provided. This results in increasing the chip size as a whole.
Also, a discharging path should be provided as much as possible. However, since there is no direct discharging path between the reset gate and the VDD terminal, a poor reset gate is caused.
Accordingly, the present invention is directed to a CCD image sensor that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a CCD image sensor which improves CDM characteristics by forming a direct discharging path between the reset gate and the VDD terminal.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a CCD image sensor according to the present invention includes a VDD terminal, a reset gate for controlling a voltage, which is converted from charges generated in a pixel, to be discharged into the VDD terminal, and a bypass portion for bypassing charges branched between the reset gate and the VDD terminal and charged by a CDM.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.